-- Boundary Scan Description Language (BSDL) for Zarlink MT90810 IC -- File name : MT90810.bsd -- DEVICE : Zarlink MT90810- Flexible MVIP Interface Circuit -- BSDL revision : STD_1149_1_1990 -- Date created: May 02 1997 -- Last Updated: December 12 2002 -- Documentation: MT90810 Released data sheet -- Package: 100 pins PQFP -- -- IMPORTANT NOTICE -- -- ZARLINK and MT90826 are trademarks of ZARLINK Semiconductor. ZARLINK products -- marketed under trademarks are protected under numerous US and foreign -- patents and pending applications, maskwork rights, and copyrights. -- -- ZARLINK reserves the right to make changes to any products and services -- at any time without notice. ZARLINK assumes no responsibility or -- liability arising out of the application or use of any information, -- product, or service described herein except as expressly agreed to -- in writing by ZARLINK Semiconductor. ZARLINK customers are advised to obtain -- the latest version of device specifications before relying on any -- published information and before placing orders for products or services. entity MT90810 is generic (PHYSICAL_PIN_MAP:string:="undefined"); port(DSo: inout bit_vector (0 to 7); DSi: inout bit_vector (0 to 7); LDo: out bit_vector (0 to 3); LDi: in bit_vector (0 to 3); CSTo: out bit; F0bn: inout bit; C4bn: inout bit; C2o : inout bit; SEC8K: inout bit; EX_8KA: in bit; EX_8KB: in bit; FRAME: out bit; CLK8: out bit; CLK4: out bit; CLK2: out bit; FGA: out bit_vector (0 to 11); FGB: out bit_vector (0 to 11); AD: inout bit_vector (0 to 7); A: in bit_vector (0 to 1); ALE: in bit; CSn: in bit; RDn: in bit; WRn: in bit; RDY: out bit; ERR: out bit; DREQ: out bit_vector (0 to 1); DACKn: in bit_vector (0 to 1); TCK: in bit; TDI: in bit; TDO: out bit; TMS: in bit; RESETn: linkage bit; X1: linkage bit; X2: linkage bit; PLL_LO: linkage bit; PLL_LI: linkage bit; VCO_VSS: linkage bit; VCO_VDD: linkage bit; VDD: linkage bit_vector (0 to 3); VSS: linkage bit_vector (0 to 5)); use STD_1149_1_1990.all; attribute PIN_MAP of MT90810: entity is PHYSICAL_PIN_MAP; constant PQFP_PACKAGE : PIN_MAP_STRING:= "DSo: (58,60,63,67,70,72,74,77),"& "DSi: (59,61,64,68,71,73,75,78),"& "LDO: (80,82,83,85),"& "LDi: (87,88,89,90),"& "CSTo: 4,"& "F0bn: 55,"& "C4bn: 56,"& "C2o: 54,"& "SEC8K: 53,"& "EX_8KA: 91,"& "EX_8KB: 92,"& "FRAME: 94,"& "CLK8: 95,"& "CLK4: 97,"& "CLK2: 98,"& "FGA: (100,1,2,3,5,20,33,46,57,69,81,96),"& "FGB: (6,7,8,9,14,28,39,51,62,76,84,99),"& "AD: (35,36,37,38,42,43,44,45),"& "A: (32,34),"& "ALE: 29,"& "CSn: 27,"& "RDn: 26,"& "WRn: 25,"& "RDY: 30,"& "ERR: 31,"& "DREQ: (49,50),"& "DACKn: (47,48),"& -- TAP controller pins "TCK:10, TMS:13, TDI:11, TDO:12,"& -- Non Boundary Scan pins "RESETn: 19,"& -- Non-compliant to IEEE1149.1 standard -- RESETn also resets the TAP controller "X1: 17,"& "X2: 18,"& "PLL_LO: 22,"& "PLL_LI: 23,"& -- Power pins "VCO_VSS: 21,"& "VCO_VDD: 24,"& "VDD: (15,40,65,86),"& "VSS: (16,41,52,66,79,93)"; --Scan port identification attribute TAP_SCAN_IN of TDI: signal is true; attribute TAP_SCAN_MODE of TMS: signal is true; attribute TAP_SCAN_OUT of TDO: signal is true; attribute TAP_SCAN_CLOCK of TCK: signal is (16.78e6, BOTH); --TAP Description attribute INSTRUCTION_LENGTH of MT90810: entity is 2; attribute INSTRUCTION_OPCODE of MT90810: entity is "BYPASS (11,10),"& "EXTEST (00),"& "SAMPLE (01)"; attribute INSTRUCTION_CAPTURE of MT90810: entity is "01"; -- there is no INSTRUCTION_DISABLE attribute for MT90810 -- there is no INSTRUCTION_PRIVATE attribute for MT90810 -- there is no optional registers in MT90810 attribute REGISTER_ACCESS of MT90810: entity is "BYPASS (BYPASS),"& -- 1149.1 bypass "BOUNDARY (EXTEST, SAMPLE)"; -- 1149.1 extest & sample -- THE BOUNDARY SCAN CHAIN -- The first cell is close to TDO attribute BOUNDARY_LENGTH of MT90810: entity is 84; attribute BOUNDARY_CELLS of MT90810: entity is "BC_2, BC_6, BC_4"; attribute BOUNDARY_REGISTER of MT90810: entity is -- num cell port function safe [ccell disval rslt] --- -- -- ----- ---- --- ---- "0 (BC_2, FGB(11), Output3, X, 52, 0, Z),"& "1 (BC_2, FGB(10), Output3, X, 52, 0, Z),"& "2 (BC_2, FGB(9), Output3, X, 52, 0, Z),"& "3 (BC_2, FGB(8), Output3, X, 52, 0, Z),"& "4 (BC_2, FGB(7), Output3, X, 52, 0, Z),"& "5 (BC_2, FGB(6), Output3, X, 52, 0, Z),"& "6 (BC_2, FGB(5), Output3, X, 52, 0, Z),"& "7 (BC_2, FGB(4), Output3, X, 52, 0, Z),"& "8 (BC_2, FGB(3), Output3, X, 52, 0, Z),"& "9 (BC_2, FGB(2), Output3, X, 52, 0, Z),"& "10 (BC_2, FGB(1), Output3, X, 52, 0, Z),"& "11 (BC_2, FGB(0), Output3, X, 52,0, Z),"& "12 (BC_2, FGA(11), Output3, X, 52, 0, Z),"& "13 (BC_2, FGA(10), Output3, X, 52, 0, Z),"& "14 (BC_2, FGA(9), Output3, X, 52, 0, Z),"& "15 (BC_2, FGA(8), Output3, X, 52, 0, Z),"& "16 (BC_2, FGA(7), Output3, X, 52, 0, Z),"& "17 (BC_2, FGA(6), Output3, X, 52, 0, Z),"& "18 (BC_2, FGA(5), Output3, X, 52, 0, Z),"& "19 (BC_2, FGA(4), Output3, X, 52, 0, Z),"& "20 (BC_2, FGA(3), Output3, X, 52, 0, Z),"& "21 (BC_2, FGA(2), Output3, X, 52, 0, Z),"& "22 (BC_2, FGA(1), Output3, X, 52, 0, Z),"& "23 (BC_2, FGA(0), Output3, X, 52, 0, Z),"& "24 (BC_6, DSo(7), Bidir, X, 32, 0, Z),"& "25 (BC_6, DSo(6), Bidir, X, 32, 0, Z),"& "26 (BC_6, DSo(5), Bidir, X, 32, 0, Z),"& "27 (BC_6, DSo(4), Bidir, X, 32, 0, Z),"& "28 (BC_6, DSo(3), Bidir, X, 32, 0, Z),"& "29 (BC_6, DSo(2), Bidir, X, 32, 0, Z),"& "30 (BC_6, DSo(1), Bidir, X, 32, 0, Z),"& "31 (BC_6, DSo(0), Bidir, X, 32, 0, Z),"& "32 (BC_2, *, Control, 0),"& "33 (BC_6, DSi(7), Bidir, X, 41, 0, Z),"& "34 (BC_6, DSi(6), Bidir, X, 41, 0, Z),"& "35 (BC_6, DSi(5), Bidir, X, 41, 0, Z),"& "36 (BC_6, DSi(4), Bidir, X, 41, 0, Z),"& "37 (BC_6, DSi(3), Bidir, X, 41, 0, Z),"& "38 (BC_6, DSi(2), Bidir, X, 41, 0, Z),"& "39 (BC_6, DSi(1), Bidir, X, 41, 0, Z),"& "40 (BC_6, DSi(0), Bidir, X, 41, 0, Z),"& "41 (BC_2, *, Control, 0),"& "42 (BC_6, F0bn, Bidir, X, 46, 0, Z),"& "43 (BC_6, C4bn, Bidir, X, 46, 0, Z),"& "44 (BC_6, C2o, Bidir, X, 46, 0, Z),"& "45 (BC_6, SEC8K, Bidir, X, 46, 0, Z),"& "46 (BC_2, *, Control, 0),"& "47 (BC_2, FRAME, Output3, X, 52, 0, Z),"& "48 (BC_2, CLK8, Output3, X, 52, 0, Z),"& "49 (BC_2, CLK4, Output3, X, 52, 0, Z),"& "50 (BC_2, CLK2, Output3, X, 52, 0, Z),"& "51 (BC_2, CSTo, Output3, X, 52, 0, Z),"& "52 (BC_2, *, Control, 0),"& "53 (BC_4, EX_8KA, Input, X),"& "54 (BC_4, EX_8KB, Input, X),"& "55 (BC_2, LDO(3), Output3, X, 52, 0, Z),"& "56 (BC_2, LDO(2), Output3, X, 52, 0, Z),"& "57 (BC_2, LDO(1), Output3, X, 52, 0, Z),"& "58 (BC_2, LDO(0), Output3, X, 52, 0, Z),"& "59 (BC_4, LDI(3), Input, X),"& "60 (BC_4, LDI(2), Input, X),"& "61 (BC_4, LDI(1), Input, X),"& "62 (BC_4, LDI(0), Input, X),"& "63 (BC_6, AD(7), Bidir, X, 71, 0, Z),"& "64 (BC_6, AD(6), Bidir, X, 71, 0, Z),"& "65 (BC_6, AD(5), Bidir, X, 71, 0, Z),"& "66 (BC_6, AD(4), Bidir, X, 71, 0, Z),"& "67 (BC_6, AD(3), Bidir, X, 71, 0, Z),"& "68 (BC_6, AD(2), Bidir, X, 71, 0, Z),"& "69 (BC_6, AD(1), Bidir, X, 71, 0, Z),"& "70 (BC_6, AD(0), Bidir, X, 71, 0, Z),"& "71 (BC_2, *, Control, 0),"& "72 (BC_2, RDY, Output3, X, 52, 0, Z),"& "73 (BC_2, ERR, Output3, X, 52, 0, Z),"& "74 (BC_2, DREQ(1), Output3, X, 52, 0, Z),"& "75 (BC_2, DREQ(0), Output3, X, 52, 0, Z),"& "76 (BC_4, RDn, Input, X),"& "77 (BC_4, WRn, Input, X),"& "78 (BC_4, CSn, Input, X),"& "79 (BC_4, ALE, Input, X),"& "80 (BC_4, A(1), Input, X),"& "81 (BC_4, A(0), Input, X),"& "82 (BC_4, DACKn(1), Input, X),"& "83 (BC_4, DACKn(0), Input, X)"; end MT90810;